In inkjet printheads, fuse technology has been used in N-channel metal-oxide semiconductor (NMOS) chips. In these chips, fuses are selectively burned to program a bit. However, fuse technology and programming fuses in this way has drawbacks. Fuses are relatively large and can be unreliable. Also, burning fuses can damage the orifice layer of the inkjet during programming and, after a fuse is burned out, metal debris from the fuse can be drawn into the ink and cause blockage in the inkjet pen, resulting in poor quality printing.
In recent years, electronically programmable read-only memory (EPROM) devices have been developed. These EPROM devices include a conductive grid of rows and columns, without fuses. Instead, a memory cell is located at each row/column intersection. Each memory cell includes a transistor structure and two gates that are separated from each other by a thin dielectric layer. One of the gates is a floating gate and the other is a control gate or input gate. In an un-programmed memory cell, the floating gate has no charge, which causes the threshold voltage to be low. In a programmed memory cell, the floating gate is charged with electrons and the threshold voltage is higher. To program a memory cell, a programming voltage (e.g., 10 to 16 volts) is applied to the control gate and drain. The programming voltage draws excited electrons to the floating gate, thereby increasing the threshold voltage. A memory cell having a lower threshold voltage is one logic value and a memory cell having a higher threshold voltage is the other logic value.
To read the state of an EPROM cell, row and column select transistors are biased on in a series path of the EPROM cell. The resistance of the EPROM cell, which indicates the logic value of the EPROM cell, is read via the row and column select transistors. Higher EPROM resistances reduce signal to noise ratios and improve reliability.
For these and other reasons, a need exists for the present invention.